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Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays
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- Suzuki, Yasunari
- NTT Computer and Data Science Laboratories, NTT Corporation JST, PRESTO
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- Sugiyama, Takanori
- Research Center for Advanced Science and Technology (RCAST), The University of Tokyo
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- Arai, Tomochika
- NTT Computer and Data Science Laboratories, NTT Corporation School of Science, The University of Tokyo
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- Liao, Wang
- Photon Science Center, The University of Tokyo
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- Inoue, Koji
- Faculty of Information Science and Electrical Engineering, Kyushu University
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- Tanimoto, Teruo
- JST, PRESTO Faculty of Information Science and Electrical Engineering, Kyushu University
Bibliographic Information
- Published
- 2022-10
- Resource Type
- conference paper
- Rights Information
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- © 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
Description
Demonstrating small error rates by integrating quantum error correction (QEC) into an architecture of quantum computing is the next milestone towards scalable fault-tolerant quantum computing (FTQC). Encoding logical qubits with superconducting qubits and surface codes is considered a promising candidate for FTQC architectures. In this paper, we propose an FTQC architecture, which we call Q3DE, that enhances the tolerance to multi-bit burst errors (MBBEs) by cosmic rays with moderate changes and overhead. There are three core components in Q3DE: in-situ anomaly DEtection, dynamic code DEformation, and optimized error DEcoding. In this architecture, MBBEs are detected only from syndrome values for error correction. The effect of MBBEs is immediately mitigated by dynamically increasing the encoding level of logical qubits and re-estimating probable recovery operation with the rollback of the decoding process. We investigate the performance and overhead of the Q3DE architecture with quantum-error simulators and demonstrate that Q3DE effectively reduces the period of MBBEs by 1000 times and halves the size of their region. Therefore, Q3DE significantly relaxes the requirement of qubit density and qubit chip size to realize FTQC. Our scheme is versatile for mitigating MBBEs, i.e., temporal variations of error properties, on a wide range of physical devices and FTQC architectures since it relies only on the standard features of topological stabilizer codes.
Journal
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- IEEE/ACM International Symposium on Microarchitecture (MICRO)
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IEEE/ACM International Symposium on Microarchitecture (MICRO) 2022 1110-1125, 2022-10
Institute of Electrical and Electronics Engineers (IEEE)
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Keywords
Details 詳細情報について
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- CRID
- 1050304936199034752
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- HANDLE
- 2324/7332376
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- Text Lang
- en
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- Article Type
- conference paper
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- Data Source
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- IRDB
