A Parallel Adaptable Routing Algorithm and its Implementation on a Two-Dimensional Array Processor

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Journal

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 6 (2), 241-250, 1987-03

Institute of Electrical and Electronics Engineers (IEEE)

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CRID

1361137045623339520
DOI

10.1109/tcad.1987.1270268
ISSN

02780070
Web Site

http://xplorestaging.ieee.org/ielx5/43/28440/01270268.pdf?arnumber=1270268
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