{"@context":{"@vocab":"https://cir.nii.ac.jp/schema/1.0/","rdfs":"http://www.w3.org/2000/01/rdf-schema#","dc":"http://purl.org/dc/elements/1.1/","dcterms":"http://purl.org/dc/terms/","foaf":"http://xmlns.com/foaf/0.1/","prism":"http://prismstandard.org/namespaces/basic/2.0/","cinii":"http://ci.nii.ac.jp/ns/1.0/","datacite":"https://schema.datacite.org/meta/kernel-4/","ndl":"http://ndl.go.jp/dcndl/terms/","jpcoar":"https://github.com/JPCOAR/schema/blob/master/2.0/"},"@id":"https://cir.nii.ac.jp/crid/1361699993525178880.json","@type":"Article","productIdentifier":[{"identifier":{"@type":"DOI","@value":"10.1063/1.338264"}},{"identifier":{"@type":"URI","@value":"https://pubs.aip.org/aip/jap/article-pdf/61/12/5286/18611154/5286_1_online.pdf"}},{"identifier":{"@type":"NAID","@value":"30015838434"}}],"dc:title":[{"@value":"Gettering of gold in silicon: A tool for understanding the properties of silicon interstitials"}],"description":[{"type":"abstract","notation":[{"@value":"<jats:p>The movement of gold in silicon is controlled by the reaction of gold with silicon interstitials, not by the intrinsic diffusion coefficient of gold. This fact is used to understand the role silicon interstitials play during gettering in silicon. An analysis of gold profiles after gettering reveals that high concentration phosphorus diffusion, argon-ion implantation, and mechanical damage of a silicon surface all act as sources of silicon interstitials. This finding is experimentally confirmed by studying the effect of an argon implanted surface layer on the diffusion of both phosphorus and antimony buried layers; only the phosphorus layer shows an enhancement, which is consistent with the injection of silicon interstitials. Studying the enhancement of the phosphorus diffusion versus temperature reveals that the phosphorus-interstitial pair has a migration energy of 1.3 eV. Under the assumption of local equilibrium between silicon interstitials and phosphorus atoms, estimates of the diffusion coefficient and equilibrium concentration of the silicon interstitial are made based on this enhanced diffusion data and the gold gettering profiles. These numbers are compared with other estimates in the literature.</jats:p>"}]}],"creator":[{"@id":"https://cir.nii.ac.jp/crid/1381699993525178880","@type":"Researcher","foaf:name":[{"@value":"Gary B. Bronner"}],"jpcoar:affiliationName":[{"@value":"Integrated Circuits Laboratory, Stanford University, Stanford, California 94305"}]},{"@id":"https://cir.nii.ac.jp/crid/1381699993525178881","@type":"Researcher","foaf:name":[{"@value":"James D. Plummer"}],"jpcoar:affiliationName":[{"@value":"Integrated Circuits Laboratory, Stanford University, Stanford, California 94305"}]}],"publication":{"publicationIdentifier":[{"@type":"PISSN","@value":"00218979"},{"@type":"EISSN","@value":"10897550"},{"@type":"NCID","@value":"AA00693547"}],"prism:publicationName":[{"@value":"Journal of Applied Physics"}],"dc:publisher":[{"@value":"AIP Publishing"}],"prism:publicationDate":"1987-06-15","prism:volume":"61","prism:number":"12","prism:startingPage":"5286","prism:endingPage":"5298"},"reviewed":"false","url":[{"@id":"https://pubs.aip.org/aip/jap/article-pdf/61/12/5286/18611154/5286_1_online.pdf"}],"createdAt":"2002-07-26","modifiedAt":"2024-02-04","relatedProduct":[{"@id":"https://cir.nii.ac.jp/crid/1360003446839775872","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Behavior of Defects Induced by Metallic Impurities on Si(100) Surfaces"}]},{"@id":"https://cir.nii.ac.jp/crid/1360284921816761344","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Dependence of Gettering Efficiency on Metal Impurities"}]},{"@id":"https://cir.nii.ac.jp/crid/1360290617746985472","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Origin of carrier lifetime degradation in floating-zone silicon during a high-temperature process for insulated gate bipolar transistor"}]},{"@id":"https://cir.nii.ac.jp/crid/1390001206248240768","@type":"Article","relationType":["isReferencedBy","isCitedBy"],"jpcoar:relatedTitle":[{"@language":"en","@value":"Reduction of the Number of Parameters for the Simulation of Impurity Diffusion."},{"@language":"ja-Kana","@value":"Reduction of the Number of Parameters f"}]},{"@id":"https://cir.nii.ac.jp/crid/1390001206249045504","@type":"Article","relationType":["isReferencedBy","isCitedBy"],"jpcoar:relatedTitle":[{"@language":"en","@value":"Electronic Defect Levels in Ultra-Shallow p+n-Junctions Formed by Low-Energy B Ion Implantation into Ge-Preamorphized Silicon."},{"@language":"ja-Kana","@value":"Electronic Defect Levels in Ultra-Shall"},{"@value":"Electronic Defect Levels in Ultra-Shallow p<sup>+</sup>n-Junctions Formed     by Low-Energy B Ion Implantation into Ge-Preamorphized Silicon"}]},{"@id":"https://cir.nii.ac.jp/crid/1390001206253395328","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@language":"en","@value":"A New High Speed Switching Bipolar Power Transistor with Corrugated Base Junctions."},{"@language":"ja-Kana","@value":"New High Speed Switching Bipolar Power Transistor with Corrugated Base Junctions"}]},{"@id":"https://cir.nii.ac.jp/crid/1390001206263729280","@type":"Article","relationType":["isCitedBy"],"jpcoar:relatedTitle":[{"@language":"en","@value":"Extended Defects and Pile-Up of Interstitial Oxygen in Silicon Wafer Due to MeV-Level Nitrogen Ion Implantation"}]},{"@id":"https://cir.nii.ac.jp/crid/1390282681232790016","@type":"Article","relationType":["isCitedBy"],"jpcoar:relatedTitle":[{"@language":"en","@value":"Self-Diffusion in Intrinsic and Extrinsic Silicon Using Isotopically Pure 30Silicon/Natural Silicon Heterostructures"},{"@value":"Self-Diffusion in Intrinsic and Extrinsic Silicon Using Isotopically Pure<sup>30</sup>Silicon/Natural Silicon Heterostructures"}]},{"@id":"https://cir.nii.ac.jp/crid/1520290885235670656","@type":"Article","relationType":["isCitedBy"],"jpcoar:relatedTitle":[{"@value":"基礎講座 基礎編:半導体プロセス技術(3)シリコン中の不純物原子拡散"},{"@language":"ja-Kana","@value":"キソ コウザ キソヘン ハンドウタイ プロセス ギジュツ 3 シリコン チュウ ノ フジュンブツ ゲンシ カクサン"}]}],"dataSourceIdentifier":[{"@type":"CROSSREF","@value":"10.1063/1.338264"},{"@type":"CIA","@value":"30015838434"},{"@type":"CROSSREF","@value":"10.1143/jjap.28.2413_references_DOI_5uuPDlCXMK6BoyTMH4rvrYh6Zmp"},{"@type":"CROSSREF","@value":"10.35848/1347-4065/abc1d0_references_DOI_5uuPDlCXMK6BoyTMH4rvrYh6Zmp"},{"@type":"CROSSREF","@value":"10.1143/jjap.36.4346_references_DOI_5uuPDlCXMK6BoyTMH4rvrYh6Zmp"},{"@type":"CROSSREF","@value":"10.1143/jjap.36.7100_references_DOI_5uuPDlCXMK6BoyTMH4rvrYh6Zmp"},{"@type":"CROSSREF","@value":"10.1143/jjap.28.l519_references_DOI_5uuPDlCXMK6BoyTMH4rvrYh6Zmp"},{"@type":"CROSSREF","@value":"10.1143/jjap.40.2717_references_DOI_5uuPDlCXMK6BoyTMH4rvrYh6Zmp"}]}