{"@context":{"@vocab":"https://cir.nii.ac.jp/schema/1.0/","rdfs":"http://www.w3.org/2000/01/rdf-schema#","dc":"http://purl.org/dc/elements/1.1/","dcterms":"http://purl.org/dc/terms/","foaf":"http://xmlns.com/foaf/0.1/","prism":"http://prismstandard.org/namespaces/basic/2.0/","cinii":"http://ci.nii.ac.jp/ns/1.0/","datacite":"https://schema.datacite.org/meta/kernel-4/","ndl":"http://ndl.go.jp/dcndl/terms/","jpcoar":"https://github.com/JPCOAR/schema/blob/master/2.0/"},"@id":"https://cir.nii.ac.jp/crid/1363670319650402944.json","@type":"Article","productIdentifier":[{"identifier":{"@type":"DOI","@value":"10.1063/1.3277044"}},{"identifier":{"@type":"URI","@value":"https://pubs.aip.org/aip/jap/article-pdf/doi/10.1063/1.3277044/15043947/024518_1_online.pdf"}}],"dc:title":[{"@value":"Modeling the single-gate, double-gate, and gate-all-around tunnel field-effect transistor"}],"description":[{"type":"abstract","notation":[{"@value":"<jats:p>Tunnel field-effect transistors (TFETs) are potential successors of metal-oxide-semiconductor FETs because scaling the supply voltage below 1 V is possible due to the absence of a subthreshold-swing limit of 60 mV/decade. The modeling of the TFET performance, however, is still preliminary. We have developed models allowing a direct comparison between the single-gate, double-gate, and gate-all-around configuration at high drain voltage, when the drain-voltage dependence is negligible, and we provide improved insight in the TFET physics. The dependence of the tunnel current on device parameters is analyzed, in particular, the scaling with gate-dielectric thickness, channel thickness, and dielectric constants of gate dielectric and channel material. We show that scaling the gate-dielectric thickness improves the TFET performance more than scaling the channel thickness and that improvements are often overestimated. There is qualitative agreement between our model and our experimental data.</jats:p>"}]}],"creator":[{"@id":"https://cir.nii.ac.jp/crid/1383670319650402947","@type":"Researcher","foaf:name":[{"@value":"Anne S. Verhulst"}],"jpcoar:affiliationName":[{"@value":"IMEC 1 , Kapeldreef 75, 3001 Leuven, Belgium"},{"@value":"K.U.Leuven 2 Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium"}]},{"@id":"https://cir.nii.ac.jp/crid/1383670319650403072","@type":"Researcher","foaf:name":[{"@value":"Bart Sorée"}],"jpcoar:affiliationName":[{"@value":"K.U.Leuven 2 Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium"}]},{"@id":"https://cir.nii.ac.jp/crid/1383670319650402946","@type":"Researcher","foaf:name":[{"@value":"Daniele Leonelli"}],"jpcoar:affiliationName":[{"@value":"K.U.Leuven 2 Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium"}]},{"@id":"https://cir.nii.ac.jp/crid/1383670319650402944","@type":"Researcher","foaf:name":[{"@value":"William G. Vandenberghe"}],"jpcoar:affiliationName":[{"@value":"K.U.Leuven 2 Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium"}]},{"@id":"https://cir.nii.ac.jp/crid/1383670319650402945","@type":"Researcher","foaf:name":[{"@value":"Guido Groeseneken"}],"jpcoar:affiliationName":[{"@value":"K.U.Leuven 2 Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium"}]}],"publication":{"publicationIdentifier":[{"@type":"PISSN","@value":"00218979"},{"@type":"EISSN","@value":"10897550"}],"prism:publicationName":[{"@value":"Journal of Applied Physics"}],"dc:publisher":[{"@value":"AIP Publishing"}],"prism:publicationDate":"2010-01-15","prism:volume":"107","prism:number":"2","prism:startingPage":"024518"},"reviewed":"false","url":[{"@id":"https://pubs.aip.org/aip/jap/article-pdf/doi/10.1063/1.3277044/15043947/024518_1_online.pdf"}],"createdAt":"2010-01-28","modifiedAt":"2023-07-05","relatedProduct":[{"@id":"https://cir.nii.ac.jp/crid/1360003449890412032","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Behavior of incorporated nitrogen in plasma-nitrided silicon oxide formed by chemical vapor deposition"}]},{"@id":"https://cir.nii.ac.jp/crid/1360003449891557632","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Simulation study of short-channel effects of tunnel field-effect transistors"}]},{"@id":"https://cir.nii.ac.jp/crid/1360284924859784704","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Circuit speed oriented device design scheme for GaAsSb/InGaAs double-gate hetero-junction tunnel FETs"}]},{"@id":"https://cir.nii.ac.jp/crid/1360284924862212608","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Device Physics and Design of a L-Shaped Germanium Source Tunneling Transistor"}]},{"@id":"https://cir.nii.ac.jp/crid/1360284924867580800","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Two-dimensional analytical model for asymmetric dual-gate tunnel FETs"}]},{"@id":"https://cir.nii.ac.jp/crid/1360566396809719936","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Tunnel Field-Effect Transistors with Extremely Low Off-Current Using Shadowing Effect in Drain Implantation"}]},{"@id":"https://cir.nii.ac.jp/crid/1360566399839689984","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"A 2-bit/Cell Gate-All-Around Flash Memory of Self-Assembled Silicon Nanocrystals"}]},{"@id":"https://cir.nii.ac.jp/crid/1360566399844048256","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Analysis of a modified recessed active tunneling field-effect transistor"}]},{"@id":"https://cir.nii.ac.jp/crid/1360847871786886400","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Device Physics and Design of a L-Shaped Germanium Source Tunneling Transistor"}]},{"@id":"https://cir.nii.ac.jp/crid/1360847874815184896","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Tunnel Field-Effect Transistors with Extremely Low Off-Current Using Shadowing Effect in Drain Implantation"}]},{"@id":"https://cir.nii.ac.jp/crid/1360847874820882176","@type":"Article","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Two-dimensional analytical model for dual-material control-gate tunnel FETs"}]}],"dataSourceIdentifier":[{"@type":"CROSSREF","@value":"10.1063/1.3277044"},{"@type":"CROSSREF","@value":"10.1143/jjap.50.06gf14_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.50.06gf14_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.51.02bc04_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.55.04eb09_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.55.094001_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.57.04fd04_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/1347-4065/ab6569_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.52.021302_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.55.074201_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.1143/jjap.51.02bc04_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"},{"@type":"CROSSREF","@value":"10.7567/jjap.56.014301_references_DOI_Pal4nnsF3Ao2PdNHtZneYVKeiBg"}]}