{"@context":{"@vocab":"https://cir.nii.ac.jp/schema/1.0/","rdfs":"http://www.w3.org/2000/01/rdf-schema#","dc":"http://purl.org/dc/elements/1.1/","dcterms":"http://purl.org/dc/terms/","foaf":"http://xmlns.com/foaf/0.1/","prism":"http://prismstandard.org/namespaces/basic/2.0/","cinii":"http://ci.nii.ac.jp/ns/1.0/","datacite":"https://schema.datacite.org/meta/kernel-4/","ndl":"http://ndl.go.jp/dcndl/terms/","jpcoar":"https://github.com/JPCOAR/schema/blob/master/2.0/"},"@id":"https://cir.nii.ac.jp/crid/1380018991009840258.json","@type":"Researcher","foaf:Person":[{"foaf:name":[{"@value":"Filip Tavernier"}],"foaf:familyName":[{"@value":"Tavernier"}],"foaf:givenName":[{"@value":"Filip"}]}],"product":[{"@id":"https://cir.nii.ac.jp/crid/1360018991009840256","@type":"Article","productIdentifier":[{"@type":"DOI","@value":"10.1109/jssc.2018.2822823"},{"@type":"URI","@value":"http://xplorestaging.ieee.org/ielx7/4/8396884/08344549.pdf?arnumber=8344549"}],"notation":[{"@value":"A 1.25-GS/s 7-b SAR ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail Comparator in 28-nm CMOS"}],"relation":[{"type":"creator"}]}],"dataSourceIdentifier":[{"@type":"CROSSREF","@value":"10.1109/jssc.2018.2822823_BphoRzmJTkOUPB2Nk3tnnI6JRG7"}]}