著者名,論文名,雑誌名,ISSN,出版者名,出版日付,巻,号,ページ,URL,URL(DOI)
KANAZAWA Kenji and MARUYAMA Tsutomu,An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA,IEICE Transactions on Information and Systems,0916-8532,一般社団法人 電子情報通信学会,2017,E100.D,8,1807-1818,https://cir.nii.ac.jp/crid/1390001204377333632,https://doi.org/10.1587/transinf.2016edp7487