{"@context":{"@vocab":"https://cir.nii.ac.jp/schema/1.0/","rdfs":"http://www.w3.org/2000/01/rdf-schema#","dc":"http://purl.org/dc/elements/1.1/","dcterms":"http://purl.org/dc/terms/","foaf":"http://xmlns.com/foaf/0.1/","prism":"http://prismstandard.org/namespaces/basic/2.0/","cinii":"http://ci.nii.ac.jp/ns/1.0/","datacite":"https://schema.datacite.org/meta/kernel-4/","ndl":"http://ndl.go.jp/dcndl/terms/","jpcoar":"https://github.com/JPCOAR/schema/blob/master/2.0/"},"@id":"https://cir.nii.ac.jp/crid/1390001204377904128.json","@type":"Article","productIdentifier":[{"identifier":{"@type":"DOI","@value":"10.1587/transele.e101.c.359"}},{"identifier":{"@type":"URI","@value":"https://www.jstage.jst.go.jp/article/transele/E101.C/5/E101.C_359/_pdf"}},{"identifier":{"@type":"NAID","@value":"130006729727"}}],"dc:title":[{"@language":"en","@value":"Towards Ultra-High-Speed Cryogenic Single-Flux-Quantum Computing"}],"dc:language":"en","description":[{"type":"abstract","notation":[{"@language":"en","@value":"<p>CMOS microprocessors are limited in their capacity for clock speed improvement because of increasing computing power, i.e., they face a power-wall problem. Single-flux-quantum (SFQ) circuits offer a solution with their ultra-fast-speed and ultra-low-power natures. This paper introduces our contributions towards ultra-high-speed cryogenic SFQ computing. The first step is to design SFQ microprocessors. From qualitatively and quantitatively evaluating past-designed SFQ microprocessors, we have found that revisiting the architecture of SFQ microprocessors and on-chip caches is the first critical challenge. On the basis of cross-layer discussions and analysis, we came to the conclusion that a bit-parallel gate-level pipeline architecture is the best solution for SFQ designs. This paper summarizes our current research results targeting SFQ microprocessors and on-chip cache architectures.</p>"}],"abstractLicenseFlag":"disallow"}],"creator":[{"@id":"https://cir.nii.ac.jp/crid/1410001204377904130","@type":"Researcher","personIdentifier":[{"@type":"NRID","@value":"9000389547614"}],"foaf:name":[{"@language":"en","@value":"ISHIDA Koki"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Graduate School of Information Science and Electrical Engineering, Kyushu University"}]},{"@id":"https://cir.nii.ac.jp/crid/1420845751158415616","@type":"Researcher","personIdentifier":[{"@type":"KAKEN_RESEARCHERS","@value":"10377864"},{"@type":"NRID","@value":"1000010377864"},{"@type":"ORCID","@value":"0000-0001-8577-3819"},{"@type":"NRID","@value":"9000321421977"},{"@type":"NRID","@value":"9000399248725"},{"@type":"NRID","@value":"9000413742855"},{"@type":"NRID","@value":"9000004785700"},{"@type":"NRID","@value":"9000340443574"},{"@type":"NRID","@value":"9000389547554"},{"@type":"NRID","@value":"9000324994431"},{"@type":"NRID","@value":"9000411949969"},{"@type":"NRID","@value":"9000363908904"},{"@type":"NRID","@value":"9000404473375"},{"@type":"NRID","@value":"9000382643201"},{"@type":"NRID","@value":"9000324994463"},{"@type":"NRID","@value":"9000367401012"},{"@type":"NRID","@value":"9000243892815"},{"@type":"NRID","@value":"9000382643162"},{"@type":"NRID","@value":"9000365485859"},{"@type":"NRID","@value":"9000413572128"},{"@type":"NRID","@value":"9000017683282"},{"@type":"NRID","@value":"9000389547622"},{"@type":"NRID","@value":"9000365485889"},{"@type":"NRID","@value":"9000347541807"},{"@type":"NRID","@value":"9000401805720"},{"@type":"NRID","@value":"9000404841545"},{"@type":"NRID","@value":"9000340442602"},{"@type":"NRID","@value":"9000382641465"},{"@type":"NRID","@value":"9000363908933"},{"@type":"NRID","@value":"9000389547615"},{"@type":"NRID","@value":"9000345197059"},{"@type":"NRID","@value":"9000402006588"},{"@type":"NRID","@value":"9000340443159"},{"@type":"NRID","@value":"9000382641269"},{"@type":"RESEARCHMAP","@value":"https://researchmap.jp/7000019501"}],"foaf:name":[{"@language":"en","@value":"TANAKA Masamitsu"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Department of Electronics, Nagoya University"}]},{"@id":"https://cir.nii.ac.jp/crid/1420001326214338432","@type":"Researcher","personIdentifier":[{"@type":"KAKEN_RESEARCHERS","@value":"80756239"},{"@type":"NRID","@value":"1000080756239"},{"@type":"ORCID","@value":"0000-0003-2348-0249"},{"@type":"NRID","@value":"9000377392442"},{"@type":"NRID","@value":"9000400171780"},{"@type":"NRID","@value":"9000006208227"},{"@type":"NRID","@value":"9000408635439"},{"@type":"NRID","@value":"9000287177760"},{"@type":"NRID","@value":"9000399239681"},{"@type":"NRID","@value":"9000017684088"},{"@type":"NRID","@value":"9000243909565"},{"@type":"NRID","@value":"9000402789959"},{"@type":"NRID","@value":"9000311504962"},{"@type":"NRID","@value":"9000398138277"},{"@type":"NRID","@value":"9000240183685"},{"@type":"NRID","@value":"9000399238790"},{"@type":"NRID","@value":"9000389547616"},{"@type":"RESEARCHMAP","@value":"https://researchmap.jp/takatsugu_ono"}],"foaf:name":[{"@language":"en","@value":"ONO Takatsugu"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Faculty of Information Science and Electrical Engineering, Kyushu University"}]},{"@id":"https://cir.nii.ac.jp/crid/1420564276178300928","@type":"Researcher","personIdentifier":[{"@type":"KAKEN_RESEARCHERS","@value":"80341410"},{"@type":"NRID","@value":"1000080341410"},{"@type":"ORCID","@value":"0000-0003-3926-0646"},{"@type":"NRID","@value":"9000005818090"},{"@type":"NRID","@value":"9000004820835"},{"@type":"NRID","@value":"9000377392443"},{"@type":"NRID","@value":"9000400171784"},{"@type":"NRID","@value":"9000316197074"},{"@type":"NRID","@value":"9000403563046"},{"@type":"NRID","@value":"9000403562582"},{"@type":"NRID","@value":"9000314076180"},{"@type":"NRID","@value":"9000024165041"},{"@type":"NRID","@value":"9000410922116"},{"@type":"NRID","@value":"9000287177551"},{"@type":"NRID","@value":"9000316196251"},{"@type":"NRID","@value":"9000403562540"},{"@type":"NRID","@value":"9000403557839"},{"@type":"NRID","@value":"9000287149010"},{"@type":"NRID","@value":"9000340443576"},{"@type":"NRID","@value":"9000016494535"},{"@type":"NRID","@value":"9000403559455"},{"@type":"NRID","@value":"9000403554946"},{"@type":"NRID","@value":"9000399239683"},{"@type":"NRID","@value":"9000287166178"},{"@type":"NRID","@value":"9000006625313"},{"@type":"NRID","@value":"9000403562640"},{"@type":"NRID","@value":"9000403562599"},{"@type":"NRID","@value":"9000046253664"},{"@type":"NRID","@value":"9000017684089"},{"@type":"NRID","@value":"9000287149008"},{"@type":"NRID","@value":"9000403561447"},{"@type":"NRID","@value":"9000403562996"},{"@type":"NRID","@value":"9000403562365"},{"@type":"NRID","@value":"9000403555335"},{"@type":"NRID","@value":"9000238412634"},{"@type":"NRID","@value":"9000240076579"},{"@type":"NRID","@value":"9000287166183"},{"@type":"NRID","@value":"9000403562636"},{"@type":"NRID","@value":"9000287149370"},{"@type":"NRID","@value":"9000329005067"},{"@type":"NRID","@value":"9000019135533"},{"@type":"NRID","@value":"9000403562302"},{"@type":"NRID","@value":"9000403559004"},{"@type":"NRID","@value":"9000403559940"},{"@type":"NRID","@value":"9000403559938"},{"@type":"NRID","@value":"9000402789960"},{"@type":"NRID","@value":"9000332222485"},{"@type":"NRID","@value":"9000367401017"},{"@type":"NRID","@value":"9000397820681"},{"@type":"NRID","@value":"9000403562793"},{"@type":"NRID","@value":"9000403559860"},{"@type":"NRID","@value":"9000403555377"},{"@type":"NRID","@value":"9000398138276"},{"@type":"NRID","@value":"9000329008018"},{"@type":"NRID","@value":"9000021273620"},{"@type":"NRID","@value":"9000403562570"},{"@type":"NRID","@value":"9000287144999"},{"@type":"NRID","@value":"9000399238791"},{"@type":"NRID","@value":"9000258118805"},{"@type":"NRID","@value":"9000314074187"},{"@type":"NRID","@value":"9000329421336"},{"@type":"NRID","@value":"9000107367333"},{"@type":"NRID","@value":"9000411032731"},{"@type":"NRID","@value":"9000016498593"},{"@type":"NRID","@value":"9000403562719"},{"@type":"NRID","@value":"9000403562622"},{"@type":"NRID","@value":"9000403562362"},{"@type":"NRID","@value":"9000287145141"},{"@type":"NRID","@value":"9000404841543"},{"@type":"NRID","@value":"9000316197639"},{"@type":"NRID","@value":"9000403562545"},{"@type":"NRID","@value":"9000403562581"},{"@type":"NRID","@value":"9000403562422"},{"@type":"NRID","@value":"9000340442604"},{"@type":"NRID","@value":"9000329007431"},{"@type":"NRID","@value":"9000403563038"},{"@type":"NRID","@value":"9000403562171"},{"@type":"NRID","@value":"9000262057671"},{"@type":"NRID","@value":"9000389547617"},{"@type":"NRID","@value":"9000314074011"},{"@type":"NRID","@value":"9000332224126"},{"@type":"NRID","@value":"9000340443161"},{"@type":"RESEARCHMAP","@value":"https://researchmap.jp/read0162847"}],"foaf:name":[{"@language":"en","@value":"INOUE Koji"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Faculty of Information Science and Electrical Engineering, Kyushu University"}]}],"publication":{"publicationIdentifier":[{"@type":"PISSN","@value":"09168524"},{"@type":"EISSN","@value":"17451353"}],"prism:publicationName":[{"@language":"en","@value":"IEICE Transactions on Electronics"},{"@language":"en","@value":"IEICE Trans. Electron."}],"dc:publisher":[{"@language":"en","@value":"The Institute of Electronics, Information and Communication Engineers"},{"@language":"ja","@value":"一般社団法人 電子情報通信学会"}],"prism:publicationDate":"2018-05-01","prism:volume":"E101.C","prism:number":"5","prism:startingPage":"359","prism:endingPage":"369"},"reviewed":"false","dcterms:accessRights":"http://purl.org/coar/access_right/c_abf2","url":[{"@id":"https://www.jstage.jst.go.jp/article/transele/E101.C/5/E101.C_359/_pdf"}],"availableAt":"2018-05-01","foaf:topic":[{"@id":"https://cir.nii.ac.jp/all?q=single%20flux%20quantum%20(SFQ)","dc:title":"single flux quantum (SFQ)"},{"@id":"https://cir.nii.ac.jp/all?q=cryogenic%20computing","dc:title":"cryogenic computing"},{"@id":"https://cir.nii.ac.jp/all?q=microprocessor","dc:title":"microprocessor"},{"@id":"https://cir.nii.ac.jp/all?q=cache%20memory","dc:title":"cache memory"},{"@id":"https://cir.nii.ac.jp/all?q=Josephson%20junction","dc:title":"Josephson junction"},{"@id":"https://cir.nii.ac.jp/all?q=low-power","dc:title":"low-power"},{"@id":"https://cir.nii.ac.jp/all?q=high-performance","dc:title":"high-performance"},{"@id":"https://cir.nii.ac.jp/all?q=energy-efficient","dc:title":"energy-efficient"}],"relatedProduct":[{"@id":"https://cir.nii.ac.jp/crid/1050587218750087168","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@language":"en","@value":"An integer arithmetic-based AMG preconditioned FGMRES solver"}]},{"@id":"https://cir.nii.ac.jp/crid/1360003446838807552","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"A Vortex Transitional NDRO Josephson Memory Cell"}]},{"@id":"https://cir.nii.ac.jp/crid/1360003449885667200","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"18-GHz, 4.0-aJ/bit Operation of Ultra-Low-Energy Rapid Single-Flux-Quantum Shift Registers"}]},{"@id":"https://cir.nii.ac.jp/crid/1360004235391075840","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"High-Speed Demonstration of Bit-Serial Floating-Point Adders and Multipliers Using Single-Flux-Quantum Circuits"}]},{"@id":"https://cir.nii.ac.jp/crid/1360011144002306432","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems"}]},{"@id":"https://cir.nii.ac.jp/crid/1360011145147408896","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, ${\\rm CORE}1\\beta$"}]},{"@id":"https://cir.nii.ac.jp/crid/1360021390747772800","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Lowering Latency in a High-Speed Gate-Level-Pipelined Single Flux Quantum Datapath Using an Interleaved Register File"}]},{"@id":"https://cir.nii.ac.jp/crid/1360021390747776768","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"50-GFLOPS Floating-Point Adder and Multiplier Using Gate-Level-Pipelined Single-Flux-Quantum Logic With Frequency-Increased Clock Distribution"}]},{"@id":"https://cir.nii.ac.jp/crid/1360283692417467392","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"An adiabatic quantum flux parametron as an ultra-low-power logic device"}]},{"@id":"https://cir.nii.ac.jp/crid/1360285710367947136","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"High-Speed Operation of Random-Access-Memory-Embedded Microprocessor With Minimal Instruction Set Architecture Based on Rapid Single-Flux-Quantum Logic"}]},{"@id":"https://cir.nii.ac.jp/crid/1360290617564425216","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Demonstration of a 52-GHz Bit-Parallel Multiplier Using Low-Voltage Rapid Single-Flux-Quantum Logic"}]},{"@id":"https://cir.nii.ac.jp/crid/1360292618670834944","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Energy-Efficient Single Flux Quantum Technology"}]},{"@id":"https://cir.nii.ac.jp/crid/1360292621442725888","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Single-flux-quantum cache memory architecture"}]},{"@id":"https://cir.nii.ac.jp/crid/1360292621490503168","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Design and implementation of a pipelined 8 bit-serial single-flux-quantum microprocessor with cache memories"}]},{"@id":"https://cir.nii.ac.jp/crid/1360306905629458816","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Investigation of timing margin in single-flux-quantum 4 bit adders for increasing clock frequency of gate-level-pipelined circuits"}]},{"@id":"https://cir.nii.ac.jp/crid/1360572092623478656","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"64-GHz Datapath Demonstration for Bit-Parallel SFQ Microprocessors Based on a Gate-Level-Pipeline Structure"}]},{"@id":"https://cir.nii.ac.jp/crid/1360574093938852224","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Experimental investigation of an eight-qubit unit cell in a superconducting optimization processor"}]},{"@id":"https://cir.nii.ac.jp/crid/1360848660321379456","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Josephson-CMOS Hybrid Memory With Nanocryotrons"}]},{"@id":"https://cir.nii.ac.jp/crid/1360855568853679104","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Quantum annealing with manufactured spins"}]},{"@id":"https://cir.nii.ac.jp/crid/1360857593688530944","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"Rapid Single-Flux-Quantum Logic Circuits Using Clockless Gates"}]},{"@id":"https://cir.nii.ac.jp/crid/1360865814734434816","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["isReferencedBy"],"jpcoar:relatedTitle":[{"@value":"A High-Throughput Multiply-Accumulate Unit With Long Feedback Loop Using Low-Voltage Rapid Single-Flux Quantum Circuits"}]},{"@id":"https://cir.nii.ac.jp/crid/1361137043818694016","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Implementation of energy efficient single flux quantum digital circuits with sub-aJ/bit operation"}]},{"@id":"https://cir.nii.ac.jp/crid/1361137045408108288","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Case study in RSFQ design: fast pipelined parallel adder"}]},{"@id":"https://cir.nii.ac.jp/crid/1361137046542852480","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Design and high-speed test of (4 × 8)-bit single-flux-quantum shift register files"}]},{"@id":"https://cir.nii.ac.jp/crid/1361418520213045120","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"A Superconducting-Nanowire Three-Terminal Electrothermal Device"}]},{"@id":"https://cir.nii.ac.jp/crid/1361699993583759360","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Design of a pipelined 8-bit-serial single-flux-quantum microprocessor with multiple ALUs"}]},{"@id":"https://cir.nii.ac.jp/crid/1362825893887678720","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Zero Static Power Dissipation Biasing of RSFQ Circuits"}]},{"@id":"https://cir.nii.ac.jp/crid/1362825894042150016","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Advanced Fabrication Processes for Superconducting Very Large Scale Integrated Circuits"}]},{"@id":"https://cir.nii.ac.jp/crid/1363107369888711040","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"The microarchitecture of the synergistic processor for a cell processor"}]},{"@id":"https://cir.nii.ac.jp/crid/1363670321192786432","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Ultra-low-power superconductor logic"}]},{"@id":"https://cir.nii.ac.jp/crid/1363951793950787712","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory"}]},{"@id":"https://cir.nii.ac.jp/crid/1363951796082627840","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"Can RSFQ logic circuits be scaled to deep submicron junctions?"}]},{"@id":"https://cir.nii.ac.jp/crid/1390001204376271488","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@language":"en","@value":"100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process"},{"@value":"100 GHz demonstrations based on the single-flux-quantum cell library for the 10 kA cm−2 Nb multi-layer process"}]},{"@id":"https://cir.nii.ac.jp/crid/1390282679354289280","@type":"Article","resourceType":"学術雑誌論文(journal article)","relationType":["references"],"jpcoar:relatedTitle":[{"@language":"en","@value":"Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation"}]}],"dataSourceIdentifier":[{"@type":"JALC","@value":"oai:japanlinkcenter.org:2004235791"},{"@type":"CROSSREF","@value":"10.1587/transele.e101.c.359"},{"@type":"CIA","@value":"130006729727"},{"@type":"OPENAIRE","@value":"doi_dedup___::9d3e7719c3a46bb9300f3bd93a78b2d3"},{"@type":"CROSSREF","@value":"10.1109/tasc.2021.3071996_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.1109/tasc.2023.3249131_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.1109/tasc.2023.3250614_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.1145/3704726_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.35848/1882-0786/ad46e5_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.1109/tasc.2021.3061353_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.1109/tasc.2021.3068960_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"},{"@type":"CROSSREF","@value":"10.1109/tasc.2023.3239329_references_DOI_Z2WManOcVo7NEKLZVp0FhSZVzwL"}]}