著者名,論文名,雑誌名,ISSN,出版者名,出版日付,巻,号,ページ,URL,URL(DOI)
BLOCK Henry and MARUYAMA Tsutomu,FPGA Hardware Acceleration of a Phylogenetic Tree Reconstruction with Maximum Parsimony Algorithm,IEICE Transactions on Information and Systems,0916-8532,一般社団法人 電子情報通信学会,2017,E100.D,2,256-264,https://cir.nii.ac.jp/crid/1390282679355624576,https://doi.org/10.1587/transinf.2015edp7433