Proposal of a Hardware Task Engine and Design, Prototype Fabrication and Evaluation of a Sensor Signal Processing SoC Using It

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  • KASHIWAGI Yoshitaka
    Corporate R & D Center, Technology & Development Div., YASKAWA ELECTRIC CORPORATION Graduate School of Information, Production and Systems, Waseda University
  • YAMAUCHI Noriyoshi
    Graduate School of Information, Production and Systems, Waseda University
  • SAKATA Toshikazu
    Corporate R & D Center, Technology & Development Div., YASKAWA ELECTRIC CORPORATION

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  • ハードウェアタスクエンジンの提案とそれを利用したセンサ信号処理SoCの設計, 試作および評価

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In this paper, a hardware called a Hardware Task Engine is proposed to achieve an embedded controller ar-chitecture for signal processing. An interrupt task which is highest priority and executes a signal processing is executed by the Hardware Task Engine. The Hardware Task Engine works highly realtime, because of it has high-speed and flexible processing ability, and it reduces a start up delay from interrupt. A Prototype of a Sensor Signal Processing SoC using a Hardware Task Engine is made by FPGA, and is evaluated by actual magnetic encoder with magnetic sensors. A start up delay from interrupt of a hardware task is 41.60ns, and it is faster than software by 3.0 times at a half clock frequency, and temperature rise is reduced to 13.4%. As a result, we can corroborate availability of a Hardware Task Engine.

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