Optimization of periphery circuits in a 1K-bit PCRAM chip for highly reliable write and read operations

DOI Web Site 被引用文献3件 参考文献18件
  • Wang Qian
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Chen Houpeng
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Li Xi
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Zhang Yiyun
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Fan Xi
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Song Zhitang
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Chen Yifeng
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Jin Rong
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
  • Hu Jiajun
    State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences

書誌事項

公開日
2014
DOI
  • 10.1587/elex.11.20141071
公開者
一般社団法人 電子情報通信学会

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説明

A 1K-bit phase change random access memory (PCRAM) with improved periphery circuits for better reliable operations has been successfully developed in 130 nm CMOS technology. A flexible write driver is proposed to provide a novel continuous step-down pulses by studying programming strategies while a reliable read circuit is designed by investigating the special transition characteristics of PCRAM, leading to an effective write operation and a non-destructive read operation without any additional changes of the storage states. In addition, a large sense margin has been achieved and the read results corresponding well with the write operations, which demonstrate the influences of technology variations have been considerably decreased with the proposed periphery circuits.

収録刊行物

  • IEICE Electronics Express

    IEICE Electronics Express 11 (24), 20141071-20141071, 2014

    一般社団法人 電子情報通信学会

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