{"@context":{"@vocab":"https://cir.nii.ac.jp/schema/1.0/","rdfs":"http://www.w3.org/2000/01/rdf-schema#","dc":"http://purl.org/dc/elements/1.1/","dcterms":"http://purl.org/dc/terms/","foaf":"http://xmlns.com/foaf/0.1/","prism":"http://prismstandard.org/namespaces/basic/2.0/","cinii":"http://ci.nii.ac.jp/ns/1.0/","datacite":"https://schema.datacite.org/meta/kernel-4/","ndl":"http://ndl.go.jp/dcndl/terms/","jpcoar":"https://github.com/JPCOAR/schema/blob/master/2.0/"},"@id":"https://cir.nii.ac.jp/crid/1390282680189865088.json","@type":"Article","productIdentifier":[{"identifier":{"@type":"DOI","@value":"10.1587/elex.5.344"}},{"identifier":{"@type":"URI","@value":"http://www.jstage.jst.go.jp/article/elex/5/9/5_9_344/_pdf"}},{"identifier":{"@type":"NAID","@value":"130000087193"}}],"dc:title":[{"@language":"en","@value":"Fast frame memory access method for H.264/AVC"}],"dc:language":"en","description":[{"type":"abstract","notation":[{"@language":"en","@value":"This paper presents an efficient memory access interface architecture for H.264/AVC encoder. In the implementation of H.264/AVC encoder, the bandwidth compression of frame memory becomes a challenging issue due to some bandwidth intensive coding tools, such as multiple frames motion estimation, deblocking filter and INTRA mode decision. In this work, by analyzing the memory access patterns of each coding function module of H.264/AVC, an efficient memory access method for the Direct Memory Access (DMA) module is proposed. The proposed method carefully designed an efficient memory mapping method to decrease the memory response delay. Simulation results show that over 50% memory access cycles can be saved by using proposed method."}],"abstractLicenseFlag":"disallow"}],"creator":[{"@id":"https://cir.nii.ac.jp/crid/1420282801205006848","@type":"Researcher","personIdentifier":[{"@type":"KAKEN_RESEARCHERS","@value":"10380130"},{"@type":"NRID","@value":"1000010380130"},{"@type":"NRID","@value":"9000006359164"},{"@type":"NRID","@value":"9000311503552"},{"@type":"NRID","@value":"9000402384797"},{"@type":"NRID","@value":"9000018852671"},{"@type":"NRID","@value":"9000365044504"},{"@type":"NRID","@value":"9000279644445"},{"@type":"NRID","@value":"9000004352967"},{"@type":"NRID","@value":"9000283354494"},{"@type":"NRID","@value":"9000412274830"},{"@type":"NRID","@value":"9000411103231"},{"@type":"NRID","@value":"9000375905468"},{"@type":"NRID","@value":"9000300212058"},{"@type":"NRID","@value":"9000018527668"},{"@type":"NRID","@value":"9000412274827"},{"@type":"NRID","@value":"9000021272496"},{"@type":"NRID","@value":"9000309571024"},{"@type":"NRID","@value":"9000413566310"},{"@type":"NRID","@value":"9000021308418"},{"@type":"NRID","@value":"9000345287801"},{"@type":"NRID","@value":"9000021343293"},{"@type":"NRID","@value":"9000257861488"},{"@type":"NRID","@value":"9000402437513"},{"@type":"NRID","@value":"9000292181907"},{"@type":"RESEARCHMAP","@value":"https://researchmap.jp/read0119895"}],"foaf:name":[{"@language":"en","@value":"Song Tian"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Computer Systems Engineering, Department of Institute of Technology and Science, Graduate School of Engineering, Tokushima University"}]},{"@id":"https://cir.nii.ac.jp/crid/1410282680189865088","@type":"Researcher","personIdentifier":[{"@type":"NRID","@value":"9000021308431"}],"foaf:name":[{"@language":"en","@value":"Kishida Tomoyuki"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Department of Electrical and Electronic Engineering, Graduate School of Engineering, Tokushima University"}]},{"@id":"https://cir.nii.ac.jp/crid/1030003658364232960","@type":"Researcher","personIdentifier":[{"@type":"KAKEN_RESEARCHERS","@value":"20170962"},{"@type":"NRID","@value":"1000020170962"},{"@type":"NRID","@value":"9000006359165"},{"@type":"NRID","@value":"9000311503554"},{"@type":"NRID","@value":"9000402384798"},{"@type":"NRID","@value":"9000018852672"},{"@type":"NRID","@value":"9000365044507"},{"@type":"NRID","@value":"9000003949903"},{"@type":"NRID","@value":"9000283354495"},{"@type":"NRID","@value":"9000004775555"},{"@type":"NRID","@value":"9000415191238"},{"@type":"NRID","@value":"9000375905472"},{"@type":"NRID","@value":"9000415148867"},{"@type":"NRID","@value":"9000018527669"},{"@type":"NRID","@value":"9000319064683"},{"@type":"NRID","@value":"9000415221960"},{"@type":"NRID","@value":"9000004848418"},{"@type":"NRID","@value":"9000309571025"},{"@type":"NRID","@value":"9000021308438"},{"@type":"NRID","@value":"9000345287804"},{"@type":"NRID","@value":"9000256072462"},{"@type":"NRID","@value":"9000021343300"},{"@type":"NRID","@value":"9000398274365"},{"@type":"NRID","@value":"9000257861491"},{"@type":"NRID","@value":"9000402437514"},{"@type":"NRID","@value":"9000292181909"},{"@type":"NRID","@value":"9000017475107"},{"@type":"RESEARCHMAP","@value":"https://researchmap.jp/simamoto"}],"foaf:name":[{"@language":"en","@value":"Shimamoto Takashi"}],"jpcoar:affiliationName":[{"@language":"en","@value":"Computer Systems Engineering, Department of Institute of Technology and Science, Graduate School of Engineering, Tokushima University"}]}],"publication":{"publicationIdentifier":[{"@type":"EISSN","@value":"13492543"},{"@type":"LISSN","@value":"13492543"}],"prism:publicationName":[{"@language":"en","@value":"IEICE Electronics Express"},{"@language":"en","@value":"IEICE Electron. Express"}],"dc:publisher":[{"@language":"en","@value":"The Institute of Electronics, Information and Communication Engineers"},{"@language":"ja","@value":"一般社団法人 電子情報通信学会"}],"prism:publicationDate":"2008","prism:volume":"5","prism:number":"9","prism:startingPage":"344","prism:endingPage":"348"},"reviewed":"false","dcterms:accessRights":"http://purl.org/coar/access_right/c_abf2","url":[{"@id":"http://www.jstage.jst.go.jp/article/elex/5/9/5_9_344/_pdf"}],"availableAt":"2008","foaf:topic":[{"@id":"https://cir.nii.ac.jp/all?q=H.264/AVC","dc:title":"H.264/AVC"},{"@id":"https://cir.nii.ac.jp/all?q=VLSI","dc:title":"VLSI"},{"@id":"https://cir.nii.ac.jp/all?q=SDRAM","dc:title":"SDRAM"},{"@id":"https://cir.nii.ac.jp/all?q=bandwidth%20compression","dc:title":"bandwidth compression"}],"relatedProduct":[{"@id":"https://cir.nii.ac.jp/crid/1360292619046788864","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"A Novel Memory Compression System For Mpeg-2 Decoders"}]},{"@id":"https://cir.nii.ac.jp/crid/1361418518881153408","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"High-performance and low-power memory-interface architecture for video processing applications"}]},{"@id":"https://cir.nii.ac.jp/crid/1361699995165614848","@type":"Article","relationType":["references"],"jpcoar:relatedTitle":[{"@value":"An Efficient Reference Frame Storage Scheme for H.264 HDTV Decoder"}]}],"dataSourceIdentifier":[{"@type":"JALC","@value":"oai:japanlinkcenter.org:0031295560"},{"@type":"CROSSREF","@value":"10.1587/elex.5.344"},{"@type":"CIA","@value":"130000087193"},{"@type":"OPENAIRE","@value":"doi_dedup___::19f3daed050c9c625b09d1489d2990cd"}]}