Author,Title,Journal,ISSN,Publisher,Date,Volume,Number,Page,URL,URL(DOI)
ZHAO Cangsang,"An 18Mb, 12.3GB/s CMOS pipeline-burst cache SRAM with 1.54Gb/s/pin","ISSCC, Dig. of Tech. Papers, Feb. 1999",,,1999,,,,https://cir.nii.ac.jp/crid/1570572700197598464,