Board-level simulation with R4400 model

Bibliographic Information

Other Title
  • R4400搭載ボードレベルシミュレーション事例

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Description

This paper deals with a board-level simulation using a full-functional MIPS R4400 simulation model. Unlike a LSI-level simulation, the board-level simulation can verify the interface logic between R4400s and multiple LSIs. The Simulation is carried out at both gate-level and RTL VHDL-level. A hardware accelerator is used at the gate-level simulation, which brings about a satisfactory simulation speed. By integrating a PCI-bus VHDL model into the simulation model, the VHDL simulation can verify almost all of the board logic. This board-level simulation was used in the development of the NEC UP4800/680 UNIX server and contributed to its superior design quality.

Journal

  • IPSJ SIG Notes

    IPSJ SIG Notes 95 (119), 77-84, 1995-12-14

    Information Processing Society of Japan (IPSJ)

Details 詳細情報について

  • CRID
    1572824501923590912
  • NII Article ID
    110002775477
  • NII Book ID
    AN10096105
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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