著者名,論文名,雑誌名,ISSN,出版者名,出版日付,巻,号,ページ,URL,URL(DOI)
S. Nakayama and S. Yamada,Gate matrix multiple-folding algorithm (for CMOS VLSI),[Proceedings] 1992 IEEE International Symposium on Circuits and Systems,,IEEE,2003-01-02,4,,2001-2004,https://cir.nii.ac.jp/crid/1871991017660437760,https://doi.org/10.1109/iscas.1992.230384