Memory Data Organization for Low-Energy Address Buses

機関リポジトリ 機関リポジトリ (HANDLE) オープンアクセス

説明

Energy consumption has become one of the most critical constraints in the design of portable multimedia systems. For media applications, address buses between processor and data memory consume a considerable amount of energy due to their large capacitance and frequent accesses. This paper studies impacts of memory data organization on the address bus energy. Our experiments show that the address bus activity is significantly reduced by 50% through exploring memory data organization and encoding address buses.

収録刊行物

  • IEICE transactions on electronics

    IEICE transactions on electronics E87-C (4), 606-612, 2004-04-01

    Institute of Electronics, Information and Communication Engineers

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