電流帰還型抵抗・容量結合エミッタ接地トランジスタ増幅回路の直流バイアス素子定数の決定法

書誌事項

タイトル別名
  • デンリュウ キカンガタ テイコウ ヨウリョウ ケツゴウ エミッタ セッチ トラ
  • Synthesis of DC bias circuit of current feedback type transistor amplifier

この論文をさがす

説明

type:text

A new method to decide the constants of transistor bias circuit.It is shown when the range of value of h_<FE> is given as between β_1 and β_2, the optimum value of h_<FE> for bias circuit design is the harmonic average 2β_1β_2(β_1+β_2) of these lower and upper limits. The emitter resistor R_E chiefly behaves to stabilize the change of the base-emitter voltage V_<BE>. The strict values of constants of DC-bias-stabilizing circuit will be decided easily and explicitly as formulas under given conditions.

source:Bulletin of the Faculty of Education, Chiba University. Part II

収録刊行物

詳細情報 詳細情報について

問題の指摘

ページトップへ