FPGA Logic Trainer for Logic Design Laboratory

Bibliographic Information

Other Title
  • FPGA を使った論理回路用実験装置
  • FPGA オ ツカッタ ロンリ カイロヨウ ジッケン ソウチ

Search this article

Abstract

An equipment for logic design laboratory was developed using an FPGA (Field ProgrammableGate Array). By meas of CAD (Computer-Aided Design) software along with the equipment,students can perform experiments for designing and implementing real hardware circuits by wiringlogic symbols. The equipment we call FPGA Logic Trainer has several advantages such that misconnectionsdue to broken wires do not occur, and erroneous designs by students can never crashthe equipment. It is compact and inexpensive, in spite of accomodating a large number of gatesenough for implementing large-scale logic circuts. In this paper, we describe the development ofthe FPGA Logic Trainer, present an example of the experiments using the equipment, and evaulateit as a logic design laboratory tool.

Journal

Details 詳細情報について

Report a problem

Back to top