Design Technology of LSI using 3 dimensional transistor

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  • 3次元型トランジスタを用いたLSIの設計法
  • 3ジゲンガタ トランジスタ オ モチイタ LSI ノ セッケイホウ

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Design technology of LSI such as system LSI ana memory using 3 dimensional transistors has been described. By using 3 dimensional transistors, FinFET, double gate transistor and stacked double gate transistor, pattern area of logic gate and full adder circuit can be reduced drastically compared with that with conventional planar transistor. By using double gate transistor and Carbon Nano Tube transistor the reconfigurable circuit with many logic functions can be realized with small pattern area. Furthermore, staked NAND MRAM with 3 dimensional spin transistor has been newly proposed. This stacked NAND MRAM is a promising candidate which replaces currently available DRAM and NAND flash memory.

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