Single-electron tunneling in a silicon-on-insulator layer embedding an artificial dislocation network
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説明
<jats:p>A two-dimensional dislocation network artificially embedded in a silicon-on-insulator (SOI) layer was examined as the source of lattice strain to generate a periodic potential. A screw dislocation network with the period of 20nm was formed in an SOI layer using a twist bonding of two SOI wafers. n-channel metal-oxide-semiconductor field-effect transistors using the dislocation-embedded SOI layer showed an oscillation of drain current with the gate voltage at the temperatures below 40K. This oscillation is ascribed to the single-electron tunneling through the spatially modulated potential. The results suggest that the dislocation network works as the strain source to form the potential array.</jats:p>
収録刊行物
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- Applied Physics Letters
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Applied Physics Letters 88 (7), 073112-073112, 2006-02-17
American Institute of Physics
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詳細情報 詳細情報について
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- CRID
- 1050282813844070272
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- NII論文ID
- 120000796478
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- NII書誌ID
- AA00543431
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- ISSN
- 00036951
- 10773118
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- HANDLE
- 10297/2531
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- 本文言語コード
- en
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- 資料種別
- journal article
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- データソース種別
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