多層配線LSIの断線故障検査に関する研究

書誌事項

タイトル別名
  • On testing of open faults in multi-layered wiring LSIs
  • タソウ ハイセン LSI ノ ダンセン コショウ ケンサ ニ カンスル ケンキュウ

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説明

Open faults are difficult to test since the floating wire occurred by an open fault has unstable voltage. In this work, the effect of adjacent lines around an open fault in multi-layered wiring LSIs is discussed. To observe the relation between an open fault and the adjacent lines, a 0.35μm CMOS IC is designed and fabricated. The open fault macros with a transmission gate and with an intentional break are included in the IC. The adjacent lines in the same layer and the different layers are placed in the test chip. The simulation and experimental results show that the voltage at the floating wire is affected by the adjacent lines.

収録刊行物

詳細情報 詳細情報について

  • CRID
    1050564287417110144
  • NII論文ID
    110006863178
  • NII書誌ID
    AA12214889
  • ISSN
    21859094
  • Web Site
    http://repo.lib.tokushima-u.ac.jp/59703
  • 本文言語コード
    ja
  • 資料種別
    departmental bulletin paper
  • データソース種別
    • IRDB
    • CiNii Articles

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