Developing an Architecture for a Single-Flux Quantum Based Reconfigurable Accelerator

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  • Mehdipour, Farhad
    School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University
  • Honda, Hiroaki
    Institute of Systems, Information Technologies and Nanotechnologies
  • Kataoka, Hiroshi
    School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University
  • Inoue, Koji
    School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University
  • Murakami, Kazuaki
    School of Information Science and Electrical Engineering, Department of Informatics, Kyushu University

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Abstract

As a solution to gain high performance computation, a large-scale reconfigurable data-path (LSRDP) processor is introduced in this paper. LSRDP is implemented by virtue of single-flux quantum circuits and integrated to a general purpose processor to accelerate the execution of data flow graphs (DFGs) extracted from scientific applications. Design procedure of the LSRDP and particularly the process of mapping DFGs onto the LSRDP are discussed and our techniques for optimizing the area of accelerator will be presented as well.

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