An Adaptive Approach for Implementing RTOS in Hardware

In recent years, along with a growth of IoT (Internet of Things), many embedded devices are equipped with processors / controllers, where a real-time OS (RTOS) is accommodated to make full use of complicated functions of the devices. It is desired that RTOS runs fast with as small memory usage as possible since it is overhead from an application program's viewpoint. Therefore, it is expected that providing hardware for a part of RTOS processing reduces memory usage while it makes the processing fast. Under the circumstances where several examples of hardware implementations of RTOS are found, we implement functions of the μITRON [12] specification in FPGA hardware. In addition, we propose an approach to adapting it to applications' requirement.

In recent years, along with a growth of IoT (Internet of Things), many embedded devices are equipped with processors / controllers, where a real-time OS (RTOS) is accommodated to make full use of complicated functions of the devices. It is desired that RTOS runs fast with as small memory usage as possible since it is overhead from an application program's viewpoint. Therefore, it is expected that providing hardware for a part of RTOS processing reduces memory usage while it makes the processing fast. Under the circumstances where several examples of hardware implementations of RTOS are found, we implement functions of the μITRON [12] specification in FPGA hardware. In addition, we propose an approach to adapting it to applications' requirement.