Quick-turnaround ASIC design in VHDL : core-based behavioral synthesis

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Bibliographic Information

Title
"Quick-turnaround ASIC design in VHDL : core-based behavioral synthesis"
Statement of Responsibility
Mohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines
Publisher
  • Kluwer Academic Publishers
Publication Year
  • c1996
Book size
25 cm

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Notes

Includes bibliographical references (p. 171-177) and index

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