A parallel algorithm synthesis procedure for high-performance computer architectures

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Bibliographic Information

Title
"A parallel algorithm synthesis procedure for high-performance computer architectures"
Statement of Responsibility
Ian N. Dunn and Gerard G.L. Meyer
Publisher
  • Kluwer Academic/Plenum Publishers
Publication Year
  • c2003
Book size
24 cm

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Notes

Includes bibliographical references (p. 103-106) and index

HTTP:URL=http://www.loc.gov/catdir/toc/fy042/2003044716.html Information=Table of contents

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