Digital hardware testing : transistor-level fault modeling and testing
Bibliographic Information
- Title
- "Digital hardware testing : transistor-level fault modeling and testing"
- Statement of Responsibility
- Rochit Rajsuman
- Publisher
-
- Artech House
- Publication Year
-
- c1992
- Book size
- 24 cm
Search this Book/Journal
Notes
"Annotated bibliography": p. 303-310
Includes bibliographical references and index
- Tweet
Details 詳細情報について
-
- CRID
- 1130282271538576512
-
- NII Book ID
- BA1863679X
-
- ISBN
- 0890065802
-
- LCCN
- 92007350
- 92008800
-
- Text Lang
- en
-
- Country Code
- us
-
- Title Language Code
- en
-
- Place of Publication
-
- Boston
-
- Classification
-
- LCC: TK7888.4
- DC20: 621.39/5/0287
-
- Data Source
-
- CiNii Books