Digital hardware testing : transistor-level fault modeling and testing

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Bibliographic Information

Title
"Digital hardware testing : transistor-level fault modeling and testing"
Statement of Responsibility
Rochit Rajsuman
Publisher
  • Artech House
Publication Year
  • c1992
Book size
24 cm

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Notes

"Annotated bibliography": p. 303-310

Includes bibliographical references and index

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