Novel bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced isolation (SITOS) and gate to shallow-well contact (SSS-C) processes for ultra low power dual gate CMOS
書誌事項
- DOI
-
- 10.1109/iedm.1996.553626
- 公開者
- IEEE
収録刊行物
-
- International Electron Devices Meeting. Technical Digest
-
International Electron Devices Meeting. Technical Digest 459-462,
IEEE