Metal Schottky Source/Drain Technology for Ultrathin Silicon-on-Thin-Box Metal Oxide Semiconductor Field Effect Transistors

書誌事項

公開日
2011-04-01
権利情報
  • https://iopscience.iop.org/page/copyright
  • https://iopscience.iop.org/info/page/text-and-data-mining
DOI
  • 10.1143/jjap.50.04dc06
公開者
IOP Publishing

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説明

<jats:p> This paper reports novel, non-epitaxial raised source/drain (S/D) approaches to decrease the parasitic external resistance in complementary metal–oxide–semiconductor field-effect transistors (CMOSFETs) fabricated on ultrathin silicon on insulator (UTSOI). This technique utilizes a metal Schottky S/D process with dopant segregation. Selectively formed NiSi<jats:sub>2</jats:sub> with dopant segregation fabricated by laser-spike annealing (LSA) significantly lowered effective Shottky-barrier height and, thereby, lowered contact resistance (ρ<jats:sub>c</jats:sub>). Satisfying the requirements of UTSOI MOSFETs in the 32-nm node for low stand-by power (LSTP) application, external parasitic resistance was reduced to 140 (NMOS) and 350 (PMOS) Ω µm. Our results show that ρ<jats:sub>c</jats:sub> is an important component of parasitic resistance in terms of improving device performance of UTSOI MOSFETs. </jats:p>

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