Bit Cost Scalable (BiCS) technology for future ultra high density memories
Description
We proposed Bit Cost Scalable (BiCS) technology in 2007 as a three-dimensional memory for the future ultra high density storage devices, which extremely reduce the bit costs by vertically stacking memory arrays with punch and plug process. We've applied it to just NAND flash, which is BiCS Flash memory, and established the mass production technology. Moreover, we can apply the BiCS technology to various memories. The critical issues and the comparison among various 3D NAND Flash-type memories are to be discussed, as well.
Journal
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- 2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
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2013 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) 1-2, 2013-04
IEEE
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Details 詳細情報について
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- CRID
- 1361418520458638976
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- Data Source
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- Crossref
- OpenAIRE