Transition metal silicide precipitation in silicon induced by rapid thermal processing and free-surface gettering

  • R. R. Kola
    Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695-7916
  • G. A. Rozgonyi
    Department of Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina 27695-7916
  • J. Li
    Department of Mechanical Engineering and Materials Science, Duke University, Durham, North Carolina 27706
  • W. B. Rogers
    Department of Mechanical Engineering and Materials Science, Duke University, Durham, North Carolina 27706
  • T. Y. Tan
    Department of Mechanical Engineering and Materials Science, Duke University, Durham, North Carolina 27706 and Microelectronics Center of North Carolina, Research Triangle Park, North Carolina 27709
  • K. E. Bean
    Texas Instruments Inc., Dallas, Texas 75265
  • K. Lindberg
    Texas Instruments Inc., Dallas, Texas 75265

書誌事項

公開日
1989-11-13
DOI
  • 10.1063/1.102342
公開者
AIP Publishing

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説明

<jats:p>We have investigated the effect of nickel and copper on defect formation in silicon employing the rapid thermal processing (RTP) scheme. Treatment by RTP induces haze in the silicon wafer front side when its back side is contaminated by either nickel or copper. Transmission electron microscopy studies showed that the haze consisted of metal silicide precipitates, which negates a previous suggestion that ‘‘oxidation-induced stacking faults’’ are the main defect forming the haze. The morphology and nature of these precipitates have been analyzed. The nickel silicide precipitates were found to be NiSi2 and the copper silicide precipitates are most likely CuSi (zinc blende structure). Both kinds of precipitates exhibited an epitaxial relationship with the silicon substrate and adopted the shape of an inverted pyramid or section of a pyramid. The present CuSi precipitate morphology differs totally from that obtained using furnace annealing, and is attributed to the availability of free-silicon surface as the main silicon self-interstitial sink. Implications for low-temperature ultralarge scale integration processing are discussed.</jats:p>

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