A Side-channel Analysis Resistant Reconfigurable Cryptographic Coprocessor Supporting Multiple Block Cipher Algorithms
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- Weiwei Shan
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
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- Longxing Shi
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
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- Xingyuan Fu
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
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- Xiao Zhang
- Shanghai Information Security Testing Evaluation & Certification Center, Shanghai, China, 086-2163789900
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- Chaoxuan Tian
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
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- Zhipeng Xu
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
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- Jun Yang
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
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- Jie Li
- National ASIC System Engineering Research Center, Southeast University, Nanjing, China, 086 - 2583793265
書誌事項
- 公開日
- 2014-06
- 権利情報
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- https://www.acm.org/publications/policies/copyright_policy#Background
- DOI
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- 10.1145/2593069.2593077
- 公開者
- ACM
収録刊行物
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- Proceedings of the 51st Annual Design Automation Conference
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Proceedings of the 51st Annual Design Automation Conference 1-6, 2014-06
ACM