Tunnel field-effect transistor without gate-drain overlap

  • Anne S. Verhulst
    IMEC , Kapeldreef 75, 3001 Leuven, Belgium and Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium
  • William G. Vandenberghe
    IMEC , Kapeldreef 75, 3001 Leuven, Belgium and Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium
  • Karen Maex
    IMEC , Kapeldreef 75, 3001 Leuven, Belgium and Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium
  • Guido Groeseneken
    IMEC , Kapeldreef 75, 3001 Leuven, Belgium and Department of Electrical Engineering, , Kasteelpark Arenberg 10, 3001 Leuven, Belgium

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<jats:p>Tunnel field-effect transistors are promising successors of metal-oxide-semiconductor field-effect transistors because of the absence of short-channel effects and of a subthreshold-slope limit. However, the tunnel devices are ambipolar and, depending on device material properties, they may have low on-currents resulting in low switching speed. The authors have generalized the tunnel field-effect transistor configuration by allowing a shorter gate structure. The proposed device is especially attractive for vertical nanowire-based transistors. As illustrated with device simulations, the authors’ more flexible configuration allows of the reduction of ambipolar behavior, the increase of switching speed, and the decrease of processing complexity.</jats:p>

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