3-10 シームレス切替えに対応したMP@HLデコーダLSI

DOI

書誌事項

タイトル別名
  • 3-10 An MP@HL Decoder LSI to have a capability for seamless switching

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説明

The MPEG-2 MP@HL decoder LSI has been developed for Japanese BS digital broadcast and US terrestrial digital broadcast. It can handle 1 HDTV and 1 SDTV, or 4 SDTV simulataneous decoding, and also have a decoding capability for seamless switching. The BS digital broadcast receiver is realized with 8-PSK demodulator LSI, this MPEG-2 decoder LSI and back end processing LSI which consists of video signal processor and graphics processor.

収録刊行物

詳細情報 詳細情報について

  • CRID
    1390001204556834176
  • NII論文ID
    110006461690
  • DOI
    10.11485/iteac.2000.0_50
  • ISSN
    24242292
    13431846
  • 本文言語コード
    ja
  • データソース種別
    • JaLC
    • CiNii Articles
  • 抄録ライセンスフラグ
    使用不可

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