書誌事項
- タイトル別名
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- Construction of Ternary Picture Processing Circuits
- 3チ ガゾウ ショリ カイロ ノ コウセイ
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抄録
Because the gray and colored images have multiple levels, a multiple-valued logic system for picture processing is more effective as compared with a binary logic system.<br>This paper proposes several operations and presents ternary digital picture processing circuits (TDPPC's). The TDPPC's consist of ternay/binary level converters, binary/ternary level converters, ternary comparators, neighborhood operation circuits, ternary half adders and center pixel output circuits.<br>Algorithms for noise reduction, border line extraction, logic difference, thinning, and connected component extraction are used in the developments and designs of the TDPPC's.<br>Moreover, this paper describes a basic system including a host personal computer. TDPPC's utilized in this system are verified by the algorithms.
収録刊行物
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- 電気学会論文誌C(電子・情報・システム部門誌)
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電気学会論文誌C(電子・情報・システム部門誌) 115 (3), 337-344, 1995
一般社団法人 電気学会
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詳細情報 詳細情報について
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- CRID
- 1390001204609064448
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- NII論文ID
- 10001706902
- 130006844618
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- NII書誌ID
- AN10065950
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- ISSN
- 13488155
- 03854221
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- NDL書誌ID
- 3593145
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- データソース種別
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- JaLC
- NDL
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- 使用不可