Experimental Study of the Power Supply Noise of a Micro DC-DC Converter under CMOS-IC Load Condition

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  • Nishijima K.
    Hakko Electronics Co., Ltd. Faculty of Engineering, Shinshu University
  • Sato T.
    Faculty of Engineering, Shinshu University
  • Yamasawa K.
    Faculty of Engineering, Shinshu University
  • Edo M.
    Fuji Electric Corporate Research and Development
  • Hayashi Z.
    Fuji Electric Corporate Research and Development
  • Katayama Y.
    Fuji Electric Corporate Research and Development
  • Nishio H.
    Fuji Electric Corporate Research and Development

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Other Title
  • Ｎｉ‐Ｚｎフェライトインダクタを集積したマイクロ電源のＣＭＯＳ‐ＩＣ負荷における電源ノイズに関する実験的検討
  • Ni-Znフェライトインダクタを集積したマイクロ電源のCMOS-IC負荷における電源ノイズに関する実験的検討
  • Ni Zn フェライト インダクタ オ シュウセキ シタ マイクロ デンゲン ノ CMOS IC フカ ニ オケル デンゲン ノイズ ニ カンスル ジッケンテキ ケントウ

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Abstract

This paper describes an experimental study of the conduction noise of a micro dc-dc converter during high-speed CMOS-logic IC loading. For comparison, experimental results obtained by using a commercialized on-board dc-dc converter are also shown. When the dc-dc converter is used as the power supply of the CMOS logic circuit, the converter noise is modulated by the clock signal of the CMOS-IC, and transmitted to the logic circuit by amplitude modulation. <BR>Since the output noise of the micro dc-dc converter module is very small, the effect of amplitude modulation by the clock signal of the CMOS-IC is relatively small. The low noise level is due to the small leakage flux of the inductor with a closed magnetic circuit, and small parasitic inductance in the converter circuit.

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