Two-Stage Stuck-at Fault Test Data Compression Using Scan Flip-Flops with Delay Fault Testability
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- Katoh Kentaroh
- Chiba University
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- Namba Kazuteru
- Chiba University
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- Ito Hideo
- Chiba University
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抄録
This paper presents a stuck-at fault test data compression using the scan flip flops with delay fault testability namely the Chiba scan flip-flops. The feature of the proposed method is two-stage test data compression. First, test data is compressed utilizing the structure of the Chiba scan flip flops (the first stage compression). Second, the compressed test data is further compressed by conventional test data compression utilizing X bits (the second stage compression). Evaluation shows that when Huffman test data compression is used in the second stage compression, the volume of test data for the proposed test data compression in ATE is reduced 35.8% in maximum, 25.7% on average of the one of the test data compressed by the conventional method. The difference of the area overhead of the proposed method from the conventional method is 9.5 percent point.
収録刊行物
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- IPSJ Transactions on System LSI Design Methodology
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IPSJ Transactions on System LSI Design Methodology 1 91-103, 2008
一般社団法人 情報処理学会
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詳細情報 詳細情報について
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- CRID
- 1390001205293247872
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- NII論文ID
- 110009598013
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- NII書誌ID
- AN00116647
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- ISSN
- 18827772
- 18826687
- 03875806
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- NDL書誌ID
- 024351946
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- NDL
- Crossref
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- 使用不可