Suppression of Parasitic MOSFETs at LOCOS Edge Region in Partially Depleted SOI MOSFETs.

  • Yasuoka Akihiko
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan
  • Iwamatsu Toshiaki
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan
  • Ipposhi Takashi
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan
  • Miyamoto Shoichi
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan
  • Yamaguchi Yasuo
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan
  • Inoue Yasuo
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan
  • Miyoshi Hirokazu
    ULSI Laboratory, Mitsubishi Electric Corporation, 4–1 Mizuhara, Itami, Hyogo 664, Japan

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Other Title
  • Suppression of Parasitic MOSFETs at LOC

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Abstract

The fixed oxide charge at a SOI/buried oxide interface and the fixed oxide charge in the LOCOS (LOCal Oxidation of Silicon) edge region are analyzed by measuring I d-V g and I d-V back characteristics of partially depleted SOI NMOSFETs with and without hydrogenation. It is considered that threshold voltage lowering of the parasitic MOSFET is caused by both the fixed oxide charges. It is also shown that hydrogenation is effective in suppressing a hump in the subthreshold region of LOCOS-isolated SOI MOSFETs. The density of the fixed oxide charge in the LOCOS edge region is reduced by hydrogenation, but the fixed oxide charge at the SOI/buried oxide interface is not. It is found that the change of the fixed oxide charge density caused by hydrogenation shows almost the same behavior in SIMOX (Separation by IMplanted OXygen) substrates of different manufacturers, but the threshold voltage of the parasitic MOSFET depends on the SIMOX substrate due to the difference in the fixed oxide charge density at the SOI/buried oxide interface.

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