FPGA Verification of the Video Retrieval System using MPEG-7 Visual Descriptors

DOI
  • Jang-Hui Kim
    Department of Electronics Engineering, Dong-A University, Republic of Korea
  • Hye-Youn Lim
    Department of Electronics Engineering, Dong-A University, Republic of Korea
  • Dae-Seong Kang
    Department of Electronics Engineering, Dong-A University, Republic of Korea

抄録

Multimedia is rapidly spreading due to the increasing number of application fields and Internet technologies. The development of a retrieval system is urgently needed to retrieve the demanded information by users. Image information is widely used for the content-based retrieval of moving pictures. It is mainly used to segment a video by scene. The process that divides video into shots is called "video segmentation". For the video segmentation, detecting cuts which are turn point of scene is called "cut detection". In this paper, for the video segmentation, we use two MPEG-7 visual descriptors; HMMD (Hue- Max-Min-Diff) color model and the EHD (Edge Histogram Descriptor). The goal of this paper is to implement the retrieval system as hardware. It is designed by Verilog HDL. We perform the FPGA verification, and implement the retrieval system for the moving picture.

収録刊行物

  • IEICE Proceeding Series

    IEICE Proceeding Series 39 A5-5-, 2008-07-07

    The Institute of Electronics, Information and Communication Engineers

キーワード

詳細情報 詳細情報について

  • CRID
    1390001277358395776
  • NII論文ID
    230000007195
  • DOI
    10.34385/proc.39.a5-5
  • ISSN
    21885079
  • 本文言語コード
    en
  • データソース種別
    • JaLC
    • CiNii Articles
  • 抄録ライセンスフラグ
    使用不可

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