A 28-GHz CMOS Vector-Summing Phase Shifter Featuring I/Q Imbalance Calibration Supporting 11.2Gb/s in 256QAM for 5G New Radio

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  • PANG Jian
    Department of Physical Electronics, Tokyo Institute of Technology
  • KUBOZOE Ryo
    Department of Physical Electronics, Tokyo Institute of Technology
  • LI Zheng
    Department of Physical Electronics, Tokyo Institute of Technology
  • KAWABUCHI Masaru
    Department of Physical Electronics, Tokyo Institute of Technology
  • SHIRANE Atsushi
    Department of Physical Electronics, Tokyo Institute of Technology
  • OKADA Kenichi
    Department of Physical Electronics, Tokyo Institute of Technology

説明

<p>Regarding the enlarged array size for the 5G new radio (NR) millimeter-wave phased-array transceivers, an improved phase tuning resolution will be required to support the accurate beam control. This paper introduces a CMOS implementation of an active vector-summing phase shifter. The proposed phase shifter realizes a 6-bit phase shifting with an active area of 0.32mm2. To minimize the gain variation during the phase tuning, a gain error compensation technique is proposed. After the compensation, the measured gain variation within the 5G NR band n257 is less than 0.9dB. The corresponding RMS gain error is less than 0.2dB. The measured RMS phase error from 26.5GHz to 29.5GHz is less than 1.2°. Gain-invariant, high-resolution phase tuning is realized by this work. Considering the error vector magnitude (EVM) performance, the proposed phase shifter supports a maximum data rate of 11.2Gb/s in 256QAM with a power consumption of 25.2mW.</p>

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