Simulation-Based Understanding of “Charge-Sharing Phenomenon” Induced by Heavy-Ion Incident on a 65nm Bulk CMOS Memory Circuit
-
- MARU Akifumi
- JAXA Tokyo Institute of Technology
-
- MATSUDA Akifumi
- Tokyo Institute of Technology
-
- KUBOYAMA Satoshi
- JAXA
-
- YOSHIMOTO Mamoru
- Tokyo Institute of Technology
抄録
<p>In order to expect the single event occurrence on highly integrated CMOS memory circuit, quantitative evaluation of charge sharing between memory cells is needed. In this study, charge sharing area induced by heavy ion incident is quantitatively calculated by using device-simulation-based method. The validity of this method is experimentally confirmed using the charged heavy ion accelerator.</p>
収録刊行物
-
- IEICE Transactions on Electronics
-
IEICE Transactions on Electronics E105.C (1), 47-50, 2022-01-01
一般社団法人 電子情報通信学会
- Tweet
詳細情報 詳細情報について
-
- CRID
- 1390009142391130880
-
- NII論文ID
- 130008138825
-
- ISSN
- 17451353
- 09168524
-
- 本文言語コード
- en
-
- データソース種別
-
- JaLC
- Crossref
- CiNii Articles
-
- 抄録ライセンスフラグ
- 使用不可