Four-quadrant multiplier using the floating-bulk technique for rail-to-rail input range and insensitivity to different input dc levels
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- Padilla-Cantoya Ivan
- Dept. of Electro-Photonics Engineering, Universidad de Guadalajara
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- Gurrola-Navarro Marco A.
- Dept. of Electro-Photonics Engineering, Universidad de Guadalajara
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- Bonilla-Barragan Carlos A.
- Dept. of Electro-Photonics Engineering, Universidad de Guadalajara
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- Molinar-Solis Jesus E.
- Dept. of Electrical Engineering, Instituto Tecnologico de Ciudad Guzman
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- Medina-Vazquez Agustin S.
- Dept. of Electro-Photonics Engineering, Universidad de Guadalajara
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- Arce-Zavala Jose M.
- Dept. of Electro-Photonics Engineering, Universidad de Guadalajara
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- Rizo-Dominguez Luis
- Dept. for Electronic, Systems and Informatics, Instituto Tecnologico y de Estudios Superiores de Occidente (ITESO)
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説明
<p>A four-quadrant analog multiplier with ultra-low supply voltage operation, rail-to-rail input swing and insensitive to different dc levels between the multiplied input signals is presented. It is based on the Floating-Bulk technique, in which the input signal is coupled to the bulk terminal of a PMOS transistor by means of an input capacitor. This allows rail-to-rail operation and eliminates the dc level of the input signals regardless of the offset between them, maintaining linearity. Moreover, it also eliminates the threshold-voltage requirement in the signal path of the input transistors, allowing very low voltage operation defined by a gate-source and a drain-source voltages. Experimental results in 0.5µm technology demonstrate rail-to-rail operation with a 1.1V supply voltage even with different dc level voltages between the multiplied input signals. It offers a distortion of THD =0.95% for an input signal of 0.2Vpp at 100kHz.</p>
収録刊行物
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- IEICE Electronics Express
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IEICE Electronics Express 19 (11), 20220130-20220130, 2022-06-10
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詳細情報 詳細情報について
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- CRID
- 1390010876017314432
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- ISSN
- 13492543
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- Crossref
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- 抄録ライセンスフラグ
- 使用不可