Proposal of Novel Stacked Logic Circuit for Neural Network with Process Technology of 3D NAND Flash Memory-Application to Multiply-Accumulate Operation-
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- WATANABE Shigeyoshi
- Shonan Institute of Technology
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- YAMAGUCHI Toru
- Ryoyo Electro Corporation
Bibliographic Information
- Other Title
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- 3D NAND型フラッシュメモリの製造技術を用いたニューラルネットワーク用積層型論理回路の提案―積和演算への適用検討―
Abstract
Novel stacked logic circuit for neural network with process technology of 3D NAND flash memory has been newly proposed. Application to multiply-accumulate operation has been extensively described. For neuron element vertical SGT type FeFET has been employed. With stacking vertical FeFET NAND connected in series structure can been successfully realized. The weight of neuron is programmed as resistance/threshold voltage of FeFET. Compared with the conventional planar FeFET structure 1/10-1/20 fabrication cost of logic circuit can be realized with 16-128 stacked layer. The design method for gate voltage of unselected FeFET and programing method has been newly described. Furthermore, optimized number of levels for one FeFET for various application has been discussed. 2 level is suitable for cloud computing system featured by high performance. 64 level is suitable for IoT system featured by low cost and power consumption.
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Details 詳細情報について
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- CRID
- 1390012733491796096
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- ISSN
- 18810217
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- Text Lang
- ja
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- Data Source
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- JaLC
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- Abstract License Flag
- Disallowed