A 58-μW Single-Chip Sensor Node Processor Using Synchronous MAC Protocol
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- Izumi Shintaro
- Department of Computer and Systems Engineering, Kobe University
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- Takeuchi Takashi
- Department of Computer and Systems Engineering, Kobe University
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- Matsuda Takashi
- Department of Computer and Systems Engineering, Kobe University
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- Lee Hyeokjong
- Department of Computer and Systems Engineering, Kobe University
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- Konishi Toshihiro
- Department of Computer and Systems Engineering, Kobe University
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- Tsuruda Koh
- Department of Computer and Systems Engineering, Kobe University
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- Sakai Yasuharu
- Department of Computer and Systems Engineering, Kobe University
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- Kawaguchi Hiroshi
- Department of Computer and Systems Engineering, Kobe University
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- Ohta Chikara
- Department of Computer and Systems Engineering, Kobe University
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- Yoshimoto Masahiko
- Department of Computer and Systems Engineering, Kobe University
Bibliographic Information
- Other Title
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- 時刻同期型MACプロトコルを用いる58-μWワンチップセンサノードプロセッサ(アナログ,アナデジ混載,RF及びセンサインタフェース回路)
- 時刻同期型MACプロトコルを用いる58-μWワンチップセンサノードプロセッサ
- ジコク ドウキガタ MAC プロトコル オ モチイル 58 ミュー Wワンチップセンサノードプロセッサ
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Abstract
In this paper, we propose a single-chip ultra low-power sensor node processor with a synchronous media access control (MAC). It is comprised of a transceiver, i8051 micro processor, and dedicated MAC processor. The test chip occupies 3x3mm^2 in a 180-nm CMOS process, including 1.38M transistors. The power is 58.0μW under a network environment.
Journal
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- ITE Technical Report
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ITE Technical Report 33.39 (0), 141-145, 2009
The Institute of Image Information and Television Engineers
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Details 詳細情報について
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- CRID
- 1390282679504717440
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- NII Article ID
- 110007484206
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- NII Book ID
- AN1059086X
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- ISSN
- 24241970
- 13426893
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- NDL BIB ID
- 10446110
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- Text Lang
- ja
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- Data Source
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- JaLC
- NDL
- CiNii Articles
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- Abstract License Flag
- Disallowed
