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Development of EMI Rule Check Tool for Supporting Printed Circuit Board Layout Design
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- Harada Takashi
- System Jisso Laboratories, NEC Corporation
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- Kusumoto Manabu
- System Jisso Laboratories, NEC Corporation
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- Yaguchi Takahiro
- NEC Informatec Systems, Ltd.
Bibliographic Information
- Other Title
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- プリント配線板設計用EMIルールチェックツール
- 平成23年技術賞受賞講演 プリント配線板設計用EMIルールチェックツール
- ヘイセイ 23ネン ギジュツショウ ジュショウ コウエン プリント ハイセンバン セッケイヨウ EMI ルールチェックツール
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Description
An EMI rule-check tool, which provides a solution that can suppress undesirable electromagnetic radiation from printed circuit boards (PCBs), is described. At the placement design stage (pre-routing), this tool examines optimal placement locations for parts by using imaginary routing and verifies the effects of the proposed EMI solution. The tool has two main functions: EMI design rule checking, and power distribution network analysis. The first function scans the board layout against 13 rules and lists errors in order of priority allowing time efficient noise countermeasures. These rules have been obtained by investigating EMI mechanisms in boards. This tool can also suppress resonance between the power and ground (GND) planes by analyzing the resonance which occurs when changing the locations of capacitors. By eliminating the causes of unnecessary electromagnetic radiation from the initial design stage, this tool substantially reduces the time and costs needed for revision after the prototype is developed and enables a rapid time-to-market.
Journal
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- Journal of The Japan Institute of Electronics Packaging
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Journal of The Japan Institute of Electronics Packaging 14 (6), 477-484, 2011
The Japan Institute of Electronics Packaging
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Details 詳細情報について
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- CRID
- 1390282679536704896
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- NII Article ID
- 10029464352
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- NII Book ID
- AA11231565
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- ISSN
- 1884121X
- 13439677
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- NDL BIB ID
- 11227999
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- Text Lang
- ja
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- Data Source
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- JaLC
- NDL Search
- Crossref
- CiNii Articles
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- Abstract License Flag
- Disallowed