逐次係数設定方式のFIR逆フィルタ回路

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タイトル別名
  • Serial Processing FIR Inverse Filter Circuit
  • チクジ ケイスウ セッテイ ホウシキ ノ FIR ギャクフィルタ カイロ

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説明

Inverse filter is used in many fields such as audio circuit, telecom line equalization both metal and optical, and wireless equalization. The purpose of the filter is to compensate the distortion of the signal caused by the transmission media. Design methods of inverse filter using IIR filter, using FFT/IFFT and adaptive FIR filter are available. However IIR filter has some problem of stability, FFT/IFFT method needs a lot of calculation and adaptive FIR filter needs a lot of time. This paper proposes a new method to generate FIR inverse filter coefficients by serial calculation of impulse response and it's expecting value. At first all coefficients of FIR filter except the first one are zero. If the input of impulse response data XN is applied to the filter, the temporal output of the FIR filter WN is compared to the expectation value EN, each FIR inverse filter coefficient gN is calculated by gN=(EN-WN)/X0 step by step. This algorism is simulated by Excel calculation. The FPGA base circuit is synthesized by VHDL and behavior model is also simulated by ISE design tool. The coefficients of the filter is generated during the input period of data XN, therefore real-time inverse filter circuit generation is available.

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