書誌事項
- タイトル別名
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- Development of a High Efficiency Inverter without Audible Noise.
- ム ソウオン コウ コウリツ インバータ ノ カイハツ
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説明
The proposed inverter combines two methods which can largely decrease the on-state and switching losses. The first method, by using a current transformer and a single transistor, makes possible to reduce the on-state loss to less than 1/3 of the usual Darlington transistor. The second method, by using the auxiliary commutation IGBT in parallel with the transistor, makes possible the zero voltage switching resulting in no switching loss. To realize the higher inverter efficiency, snubber and its loss recovery circuit are employed. Three three-phase inverters were made experimentally to confirm the idea. Its volume and weight can be decreased to 1/3 than that of conventional three-phase inverter, and obtained the efficiency of 98.0% from 5kW to 20kW at switching frequency of 16kHz.
収録刊行物
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- 電気学会論文誌D(産業応用部門誌)
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電気学会論文誌D(産業応用部門誌) 116 (12), 1205-1210, 1996
一般社団法人 電気学会
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詳細情報 詳細情報について
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- CRID
- 1390282679632433664
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- NII論文ID
- 10001789471
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- NII書誌ID
- AN10012320
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- ISSN
- 13488163
- 09136339
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- NDL書誌ID
- 4087070
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- 本文言語コード
- ja
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- データソース種別
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- JaLC
- NDL
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- 使用不可