Tri-level capacitor-splitting switching scheme with high energy-efficiency for SAR ADCs

DOI Web Site 4 Citations 9 References
  • Wang Hao
    School of Information Science and Engineering, Fujian University of Technology
  • Liu Chuanyang
    College of Electronic and Information Engineering, Suzhou University of Sciences and Technology
  • Xie Wenming
    School of Information Science and Engineering, Fujian University of Technology
  • Zhang Qidong
    School of Microelectronics, Xidian University

Description

<p>An energy-efficient tri-level capacitor-splitting switching algorithm for successive approximation register (SAR) analog-to-digital converters (ADCs) is proposed. The proposed switching scheme is a combination of the zero-power-consumption switching algorithm and the one-side double-level switching technique. By zero-power-consumption switching algorithm, there is no switching power dissipation during the first three bit cycles. Furthermore, only one-side capacitors are switched between two reference voltages (ground and VCM) during the remaining bit conversions, which is more energy-saving than the monotonic switching method. The proposed switching method reduces the switching energy by 50.59% compared to the Sanyal and Sun proposed one.</p>

Journal

  • IEICE Electronics Express

    IEICE Electronics Express 13 (20), 20160645-20160645, 2016

    The Institute of Electronics, Information and Communication Engineers

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