An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating
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- Wakaba Yoichi
- Graduate School of Information Sciences, Hiroshima City University
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- Wakabayashi Shin'ichi
- Graduate School of Information Sciences, Hiroshima City University
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- Nagayama Shinobu
- Graduate School of Information Sciences, Hiroshima City University
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- Inagi Masato
- Graduate School of Information Sciences, Hiroshima City University
Description
This paper proposes a method using partial reconfiguration to realize a compact regular expression matching engine, which can update a pattern quickly. In the proposed method, a set of partial circuits, each of which handles a different class of regular expressions, are provided in advance. When a regular expression pattern is given, a compact matching engine dedicated to the pattern is implemented on FPGA by combining the partial circuits according to the given pattern using partial reconfiguration. The method can update a pattern quickly, since it does not need re-design of a circuit. Experimental results show that the proposed method reduces 60% circuit size compared with the previous method without increasing the pattern updating time significantly.
Journal
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- Information and Media Technologies
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Information and Media Technologies 9 (4), 466-474, 2014
Information and Media Technologies Editorial Board
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Details 詳細情報について
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- CRID
- 1390282680242408192
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- NII Article ID
- 130004705281
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- ISSN
- 18810896
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- Text Lang
- en
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- Data Source
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- JaLC
- CiNii Articles
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- Abstract License Flag
- Disallowed