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Hardware Acceleration of Fitness Function in MD-PSO Algorithm for Adaptive FIR Filter Design
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- Chen Darong
- 早大
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- Dong Huijiao
- 早大
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- Jia Molin
- 早大
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- Baba Takaaki
- 早大
Bibliographic Information
- Other Title
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- 適応フィルター設計における多次元PSOアルゴリズム評価関数演算部のハードウェア高速化設計
Description
Adaptive FIR filter based on Multi-Dimension PSO (MD-PSO) algorithm is an excellent solution for real-time applications. Nonetheless, the fitness function calculation of Multi-Dimension PSO in hardware costs much time, and the accuracy is not so satisfactory. This paper extends the work by proposing an efficient pipeline technique for making the calculation of fitness function faster. The experiment results demonstrate that the calculation speed of proposed architecture achieves 1.15us which is 2.04 times faster than conventional approach.
Journal
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- Record of Joint Conference of Electrical and Electronics Engineers in Kyushu
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Record of Joint Conference of Electrical and Electronics Engineers in Kyushu 2011 (0), 85-85, 2011
Committee of Joint Conference of Electrical, Electronics and Information Engineers in Kyushu
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Keywords
Details 詳細情報について
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- CRID
- 1390282680641534464
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- NII Article ID
- 130005455861
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- Data Source
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- JaLC
- CiNii Articles
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- Abstract License Flag
- Disallowed