適応フィルター設計における多次元PSOアルゴリズム評価関数演算部のハードウェア高速化設計

DOI

書誌事項

タイトル別名
  • Hardware Acceleration of Fitness Function in MD-PSO Algorithm for Adaptive FIR Filter Design

説明

Adaptive FIR filter based on Multi-Dimension PSO (MD-PSO) algorithm is an excellent solution for real-time applications. Nonetheless, the fitness function calculation of Multi-Dimension PSO in hardware costs much time, and the accuracy is not so satisfactory. This paper extends the work by proposing an efficient pipeline technique for making the calculation of fitness function faster. The experiment results demonstrate that the calculation speed of proposed architecture achieves 1.15us which is 2.04 times faster than conventional approach.

収録刊行物

詳細情報 詳細情報について

  • CRID
    1390282680641534464
  • NII論文ID
    130005455861
  • DOI
    10.11527/jceeek.2011.0_85
  • データソース種別
    • JaLC
    • CiNii Articles
  • 抄録ライセンスフラグ
    使用不可

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