On the Round-off Error Estimation Using IEEE754 Floating-Point Arithmetic
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- Kouya Tomonori
- Ishikawa Polytechnic College
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- Nagasaka Hideko
- College of Science and Technology, Nihon University
Bibliographic Information
- Other Title
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- IEEE754規格を利用した丸め誤差の測定法について
- IEEE754 キカク オ リヨウシタ マルメ ゴサ ノ ソクテイホウ ニ ツ
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Abstract
We propose the round-off error estimation using IEEE754 floating-point arithmetic which widely used on various workstations and personal computers. Interval Analysis is one of the standard methods in order to estimatite round-off errors in numerical processes, but it is not more convenient for a lot of users. In this paper, we explain the proposed estimation and show the source programs which can run on SparcStaion, PC-9801 and IBM PC/AT compatible. Finally, numerical experiments demonstrate the effectiveness of the proposed estimation.
Journal
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- Transactions of the Japan Society for Industrial and Applied Mathematics
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Transactions of the Japan Society for Industrial and Applied Mathematics 7 (1), 79-89, 1997
The Japan Society for Industrial and Applied Mathematics
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Details 詳細情報について
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- CRID
- 1390282680744720128
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- NII Article ID
- 110001883643
- 10021558574
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- NII Book ID
- AN10367166
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- ISSN
- 09172246
- 24240982
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- NDL BIB ID
- 4159694
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- Text Lang
- ja
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- Data Source
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- JaLC
- NDL
- CiNii Articles
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- Abstract License Flag
- Disallowed