Reliability of Ultra-Thin Gate Oxide Below 3 nm in the Direct Tunneling Regime.

  • Depas Michel
    Interuniversity Microelectronics Centre, Kapeldreef 75, B–3001 Leuven, Belgium
  • Degraeve Robin
    Interuniversity Microelectronics Centre, Kapeldreef 75, B–3001 Leuven, Belgium
  • Nigam Tanya
    Interuniversity Microelectronics Centre, Kapeldreef 75, B–3001 Leuven, Belgium
  • Groeseneken Guido
    Interuniversity Microelectronics Centre, Kapeldreef 75, B–3001 Leuven, Belgium
  • Heyns Marc
    Interuniversity Microelectronics Centre, Kapeldreef 75, B–3001 Leuven, Belgium

書誌事項

タイトル別名
  • Reliability of Ultra-Thin Gate Oxide be

この論文をさがす

抄録

Cluster tool furnace technology was used to control the growth of extremely uniform ultra-thin 1.5 nm to 3 nm SiO2 layers on Si. The transition from Fowler-Nordheim tunneling to direct tunneling electron injection for sub-3-nm oxide poly-Si gate metal-oxide-silicon capacitor structures is described and the influence on the oxide reliability is discussed. It is shown that oxide breakdown can still occur at low voltages in the direct tunneling regime under the condition of electron injection from the poly-Si gate. Soft breakdown of these ultra-thin oxide layers, accompanied by the occurrence of complex fluctuations in the direct tunneling current, is demonstrated. Using this as the definition of sub-3-nm oxide breakdown, it is shown for the first time that the time to dielectric breakdown of the sub-3-nm gate oxide in the direct tunneling regime is determined by the electrical field strength in the oxide similarly to the case of the sub-3-nm dielectric breakdown in Fowler-Nordheim tunnel stressing.

収録刊行物

被引用文献 (1)*注記

もっと見る

参考文献 (39)*注記

もっと見る

詳細情報 詳細情報について

問題の指摘

ページトップへ